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NP52N06SLG
ELECTRICAL CHARACTERISTICS (T A = 25 ° C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
SYMBOL
I DSS
I GSS
V GS(off)
TEST CONDITIONS
V DS = 60 V, V GS = 0 V
V GS = ± 20 V, V DS = 0 V
V DS = 10 V, I D = 1 mA
MIN.
1.5
TYP.
2.0
MAX.
10
± 10
2.5
UNIT
μ A
μ A
V
Forward Transfer Admittance
Note
| y fs |
V DS = 10 V, I D = 26 A
8
14.5
S
Drain to Source On-state Resistance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Note
R DS(on)1
R DS(on)2
C iss
C oss
C rss
t d(on)
t r
t d(off)
t f
Q G
Q GS
Q GD
V GS = 10 V, I D = 26 A
V GS = 4.5 V, I D = 26 A
V DS = 10 V
V GS = 0 V
f = 1 MHz
V DD = 30 V
I D = 26 A
V GS = 10 V
R G = 0 Ω
V DD = 48 V
V GS = 10 V
I D = 52 A
13.6
17.5
2100
250
150
12
10
47
9
39
7.5
12
17.5
25
m Ω
m Ω
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Note
V F(S-D)
t rr
Q rr
I F = 52 A, V GS = 0 V
I F = 52 A, V GS = 0 V
di/dt = 100 A/ μ s
1.0
36
39
1.5
V
ns
nC
Note Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
PG.
D.U.T.
R G = 25 Ω
50 Ω
L
V DD
PG.
D.U.T.
R G
R L
V DD
V GS
Wave Form
V GS
0
10%
V GS
90%
V GS = 20 → 0 V
V DS
90%
90%
V DD
I D
I AS
BV DSS
V DS
V GS
0
τ
V DS
Wave Form
V DS
0
t d(on)
10%
t r
10%
t d(off)
t f
Starting T ch
τ = 1 μ s
Duty Cycle ≤ 1%
t on
t off
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I G = 2 mA
R L
2
PG.
50 Ω
V DD
Data Sheet D18202EJ2V0DS
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